1. Field of the Invention
The present invention relates to a resistive memory device, and more particularly to a resistive random access memory device having a nano-scale tip, memory array using the same and fabrication method thereof.
2. Description of the Related Art
A resistive random access memory device, called RRAM, is a memory device using a resistance change layer configured to change its resistance according to an applied voltage such as a transition metal oxide.
This RRAM is expected to be a next generation memory that can exceed the NAND flash memory, which is the current mainstream memory technology in features of the operation speed, power consumption and integration density. Although RRAM reports have been made from 2005, over the last 10 years and now RRAM studies have not advanced from the research level of finding the material that allows the resistance change. Even though many materials applicable to RRAM were found already, people have not yet studied earnestly on the optimal design issue of the device.
The reasons are various. Among them, as shown in FIGS. 1 and 2 cited from Korean Patent No. 10-1113014, the conventional RRAM has a chronic reliability problem because of instability of Reset vRESET and Set vSET voltages. Here, vSET is an applied voltage when an electrical conduction path (i.e., filament) formed in a resistance change layer between the bottom and top electrodes is connected (namely, at the time of shifting into a low resistance state, LRS) and vRESET is an applied voltage when the filament is disconnected (namely, at the time of shifting into a high resistance state, HRS). Generally, Set voltage is higher than Reset voltage (vSET>vRESET) and a program margin is the voltage difference (vSET−vRESET) between Set and Reset voltages. And a data storage state can be read by sensing a current flowing between bottom and top electrodes after applying a read voltage lower than Reset voltage. A read margin is the current difference between LRS and HRS currents in the read voltage.
The reason of the reliability problem is that filaments are variously formed in a vertical direction due to the grain boundaries of materials (e.g., transition metal oxides) which form the resistance change layer.
To overcome the above problem, Korean Patent No. 10-1113014 discloses an attempt to minimize the number of filaments involved into the transition by forming the resistance change layer as a spacer shape to minimize maximally the area contacting the top electrode. Korean Patent Publication No. 10-2008-0048757 discloses an attempt to form reproducible filaments by focusing electric field through a protruding bottom or top electrode filled in a groove formed along a grain boundary of a resistance change layer. Korean Patent No. 10-1263309 discloses a technology for concentrating electric field by protruding a single top electrode toward a bottom electrode in each cell through processes for fabricating a side wall and a spacer.
However, Korean Patent No. 10-1113014 has a limit of technique for minimizing the number of filaments because the resistance change layer is formed as a spacer shape. Korean Patent Publication No. 10-2008-0048757 has difficulty in commercialization by being formed with not only a plurality of protruding parts but also a non-uniform shape because grooves are formed on the surface by the chemical etching process when the protruding part of the top electrode is formed or because the protruding part is formed of metal particles that remain after coating and evaporating the liquid mixture containing various metal particles when protruding part of the bottom electrode is formed. In Korean Patent No. 10-1263309, it discloses a fabrication method that cannot form the protruding part on the bottom electrode.